T1: Integration and Coupling of Tightly Coupled Processor Arrays

Principal Investigators:

Dr. Hannig, Prof. Teich

Scientific Researchers:

Dr. J. Falk, F. Khosravi, M. Witterauf

External Partners:

Infineon Technologies AG


Objective of this transfer project is the analysis of massively parallel accelerator architectures, in particular tightly coupled processor arrays (TCPAs), and their integration into a commercial state-of-the-art embedded microcontroller architecture such as Infineon’s AURIX, or ARM’s Cortex-A series of processors. Concrete research questions, which are of mutual interest for both project partners, include the investigation of suitable ways of coupling while respecting the different performance and bandwidth capabilities of the individual subsystems. Particularly, novel cache-based coupling architectures shall be investigated. The integrated system shall be prototyped and evaluated for selected benchmarks from the domain of advanced driver assistance systems with respect to energy efficiency, area cost, and the predictability of timing as well as safety and reliability.